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Model the MMC5 scanline IRQ the way the chip actually works: the line counter runs every frame and asserts at the compare scanline, a $5204 read acknowledges (de-asserts) the current assertion, and the counter then re-asserts the next frame without needing to be reprogrammed. Previously the read reported the pending flag but never de-asserted, and the IRQ was only armed by an explicit $5203 write, so a game that armed the split once and polled $5204 to sync (Metal Slader Glory's message-window raster split) never saw the acknowledge it expected. Add irq_compare_time() for the scanline->time conversion, re-arm irq_time from the compare scanline in end_frame, and clear irq_time on a $5204 read that reports the pending flag. Castlevania 3, which reprograms $5203 from its IRQ handler every frame, is byte-for-byte identical over 900 frames; the 15-game non-MMC5 battery plus Metal Slader Glory are unchanged; the other MMC5 titles (Gemfire, Ishin no Arashi, Uncharted Waters, Just Breed) still render correctly. Frame rates are within measurement noise. This corrects the IRQ acknowledge/re-arm behaviour to match the reference (FCEUmm's MMC5_hb + X6502_IRQEnd); it is not by itself a visible fix for any one title.
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