Bug fixes:
- pic: honor auto-EOI mode (ICW4 bit 1); ISR bit now only set when
auto-EOI is disabled (previously set unconditionally)
- spec: correct port 0xB0-in polarity (0x00 = hard disk, 0xFF = floppy)
to match both the Odin and C implementations
- debug: gate cga_regs/cga_vram handlers on the video adapter actually
being CGA (returned garbage when EGA/HGC was active)
Dead code removal:
- unused public APIs: vxt_cpu_flush_prefetch, vxt_bus_set_pic,
vxt_uart_registers, vxt_uart_set_error, vxt_disk_bootstrap
- write-only CPU instruction-stream fields + MAX_INSTRUCTION_SIZE
- unused macros VXT_CPU_USE_PREFETCH, MBOX_TOTAL_SIZE
- debug server: g_active_server, single_step, last_segments, SEG_TAG_*
- UART iir field, always-false ega_config stub, empty destroy stubs
(joystick, UART, mouse), exec_wait/exec_esc folded into exec_nop
- frontend: BIOS_ROM_BASE/VXTX_ROM_BASE, mixer HOSTFS_DURATION/
HOSTFS_VOLUME/seek_volume, unreachable clamps, ini_parse return value
- misc dead stores/clamps (hostfs, hgc), dangling comment (cpu.c)
Makefile: drop 12 redundant pattern rules, replace dead check-circle
test with a real compiler check, drop duplicated distclean line,
complete .PHONY, collapse flag lists, develop honors LIBRETRO_OUT.
STATUS.md: correct stale module test counts (110 -> 119).
Replaces the synchronous Core 0 bridge with the guest-visible async
polling protocol that was proven working on Pi 3 USB floppy boot.
Core changes:
- Disk controller now handles VXT_DISK_NOT_READY from frontends
- Pending operation state tracks multi-sector transfers
- VXTX BIOS polls port 0xB1 and reads AL/AH from 0xB2/0xB3
- Added floppy_timing / harddrive_timing INI toggles
Circle frontend:
- vfs_read/vfs_write return VXT_DISK_NOT_READY for USB handles
- Core 0 processes blocking USB jobs via usb_disk_process()
- Core 1 BIOS polling loop runs without stalls
Docs:
- Added async completion protocol to SPEC.md
- Updated STATUS.md for verified Pi 3 USB floppy boot
Default Pi config remains safe (no USB passthrough enabled).
Replace the 80186 instruction set extension with full NEC V20 support:
- Rename cpu_186.c to cpu_v20.c and add cpu_cycles.c/h for per-CPU
cycle lookup tables indexed by opcode
- Change CPU type from bitmask options to vxt_cpu_type_t enum
(VXT_CPU_8088 / VXT_CPU_V20)
- Add V20-specific instructions: TEST1/CLR1/SET1/NOT1, ROL4/ROR4,
ADD4S/SUB4S/CMP4S, INS/EXT, REPNC/REPC
- Update IDIV to ignore REP prefix quirk on V20
- Update test infrastructure and docs for V20 nomenclature
On real PC/XT hardware, PPI port 0x61 bits 6-7 control keyboard
clock/data lines, not a reset trigger. The removed logic caused an
infinite IRQ1 loop when games cleared speaker bits (e.g. Sopwith),
locking keyboard input and leaving a hanging speaker note.
Also removes kb_reset state and related debug/test code.
Merge DESIGN.md and ARCHITECTURE.md into a single unified SPEC.md covering
philosophy, architecture, and implementation details. Port the IBM Game
Control Adapter from the Odin codebase using the one-shot RC timing model
with fixes for button state overwrite and floating-point ticker drift.
Andreas T Jonsson